IES Electronics and Telecommunication paper set for practice

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IES Electronics paper set 4

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Which of the following design levels of a computer are widely used in computer design?

1. Gate level

2. Processor level

3. Register level

4. User level

1 1 and 3 only

2 2 and 4 only

3 3 and 4 only

4 1, 2 and 3 only

Which one of the following is the correct sequence of steps for executing an instruction during CPU's processing ?

1 Fetch instruction, Read data, Decode instruction, Store data and Execute instruction

2 Decode instruction, Read data, Execute instruction, Fetch Next instruction and Store data

3 Decode instruction, Decode next operands, Fetch Next instruction and Store data

4 Fetch instruction, Decode instruction, Read operands, Execute instruction and Store data

Which one of the following is the correct combination of registers in DMA controller?

1 Data register, Stack pointer and Data counter

2 Data register, Address register and Data counter

3 Data register, Stack pointer and Address register

4 Data register, Program counter and Data counter

A multiprocessing technology which enables software to treat a single processor as two processors to utilize the processing power in the chip that would otherwise go unused and lets the chip operate more efficiently resulting in faster processing is called

1 Systematic multiprocessing

2 Massively parallel processing

3 Co–processing

4 Hyper threading

Which of the following factors are to be considered while selecting number representations to be used in a computer?

1. Number types to be represented

2. Range of values to be encountered

3. Cost of the hardware to store and process the numbers

4. Positional notation with fixed weight

1 1,2 and 4 only

2 1,3 and 4 only

3 2, 3 and 4 only

4 1,2 and 3 only

If a negative binary number is to be represented by n–bits, then the standard format will be

1 Sign bit '0' on left and magnitude right

2 Sign bit ‘1’ on left and magnitude on right

3 Sign bit ‘0’ on right and magnitude on left

4 Sign bit '1' on right and magnitude on left

The physical address translation in virtual memory address with Memory Management Unit (MMU) is done by which one of the following mechanisms?

1 Multiply virtual, address by some constant

2 Translation lookaside buffer (TLB)

3 Encryption key

4 Using general purpose register in CPU

In a tunnel diode, the width of the junction barrier is

1 Directly proportional as the square root of impurity concentration

2 Inversely proportional as the square root of impurity concentration

3 Directly proportional as square of impurity concentration

4 Inversely proportional as square of impurity concentration

When maximum reverse-biasing voltage is applied between the collector and base terminals of the transistor and emitter is open circuited, breakdown occurs due to

1 Avalanche breakdown

2 Avalanche multiplication

3 Punch–through

4 Reach–through

A depletion–type MOSFET can be operated in an enhancement mode where negative charges are induced into n–type channel by applying

1 Positive Gate Voltage

2 Negative Gate Voltage

3 Negative Drain Voltage

4 Positive Drain Voltage

The double base diode which is operated with the emitter forward biased and a smaller emitter junction is called

1 Field Effect Transistor (FET)

2 Uni-Junction Transistor (UJT)

3 Bipolar Junction Transistor (BJT)

4 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

During a low frequency response of an amplifier which is invariably of RC–coupled type, there is a range of frequency characteristics over which the amplification is constant and delay is also constant, called

1 Low band frequency

2 Mid band frequency

3 High band frequency

4 Hyper band frequency

In a crystal oscillator, especially when piezoelectric crystal like quartz is applied, then the inductor L, capacitor C and resistor R are the analogs of the mechanical system as

1 Mass, compliance, viscous-damping factor

2 Mass, spring constant, viscous-damping

3 Mass, momentum, viscous-damping factor

4 Mass, displacement, viscous-damping factor

In a feedback amplifier, which configuration increases bandwidth, decreases non-linear distortion and improves transconductance with negative feedback ?

1 Voltage-series

2 Voltage-shunt

3 Current-series

4 Current-shunt

In order to balance the offset voltage of an operational amplifier, a small DC voltage is applied to input terminals where the connection is

1 Series with both inverting as well as non–inverting input

2 Shunt with inverting input

3 Series with non–inverting inpu

4 Shunt with non–inverting input

In a paraphase amplifier, where two amplifiers are connected in cascade, the output from second stage

1 Equals signal input without change of sign

2 Does not equal to signal input but has sign change

3 Does not equal to signal input and has no sign change

4 Equals signal input with change of sign